Hardware Engineer (FPGA/ASIC) Internship, June-September

Full job description

Our goal is to give you a real sense of what it's like to work at Jane Street full time while also providing a truly unparalleled educational experience. As an intern, you are paired with full-time employees who act as mentors, collaborating with you on real-world projects we actually need done. In this internship, you'll learn how we use tools to make programming faster, more pleasant, and more reliable, applying these same principles to hardware engineering. We use Hardcaml, an OCaml library for succinctly describing hardware in RTL. No previous knowledge of Hardcaml is required. The hardware team at Jane Street works on both FPGA and ASIC designs. During the program, you'll dive deep on one project, mentored closely by the full-time employees who helped design it. We expect interns to build hardware applications from concept to a working design; your projects will predominantly involve OCaml and Hardcaml, for both RTL design and testing/integration. About You: comfortable with a software programming language; experienced with a Hardware Description (or Construction) language (VHDL, Verilog, Chisel, Pymtl, or other); experienced working with FPGA or ASIC vendor tools (Vivado or Quartus for FPGAs, Genus or Innovus for ASICs); experienced with building a working hardware project through an academic, professional, or personal project; interested in learning how to use FPGAs or ASICs in the context of networking; fluent in English. No background in finance, OCaml, or functional programming required.